PCB signal integrity can easily be divided into three categories:
1. The timing problems (Timing) issues. Timing is the key issue, the current core chip manufacturer designer basically ready-made solutions, so the design of the main part of the work is how to ensure compliance with the timing chip PCB can work requirements.
2. The common SI problems. That resolve driver issues or to calculate the termination resistor in series damping resistor values, PCB laminate structure and characteristic impedance calculation, wiring topology analysis.
3. The microwave band transmission problems. Commonly known GHz SI. Design needs to solve various problems usually only in the field of microwave transmission link will consider the small size and shape because walking lines, vias and materials caused. For ordinary SI issue, Hyperlynx, SQ and ICX can be solved. Basically domestic users already know how to handle and analyze common SI problems. On Tools is concerned, SQ, Hyperlynx or ICX can be solved. Performance, SQ's strengths is that it is itself a PCB layout tool, so it suitable for practical PCB layout routing performance is better, that is, on-site commissioning (On-The-Fly) performance is better. But SQ no timing analysis capabilities, limited only simple timing measurements. Hyperlynx advantage is easy to use, but neither the timing analysis, and no timing measurements. Rather it is, Hyperlynx more convenient in EMC prediction, which is an advantage Hyperlynx of. Complexity ICX weaknesses and set on its GUI enables users reluctant to use the tool. Currently common SI problems, mainly during the PCB layout designer. Schematic designer is basically do not do the work of the area. The main reason is not familiar with the tools and the SI poorly understood. In addition, there are a considerable number of domestic users do not understand the basic logic operating level requirements and impedance concepts, unaware Source-Load-driven analysis. Thereby causing a lot of pre-designed PCB because the device manufacturer's replacement, causing the system to function abnormally and redesign. A typical example is the only choice Pericon 16245 rather not use TI's 16245, and such examples happened many times.

Timing issues, the current domestic users have not mastered basic. SQ minority of users will use Excel tables to prepare timing requirements, the latter from the measured parameters manually fill SQ to Excel tables to calculate whether the final design meets timing requirements. Even so, very few people understand the timing, whether it is schematic and PCB layout designer designers are hard to read from the chip timing data sheet. Many times, because of errors caused by design constraints repeatedly. Timing problems are mainly parallel interface problems. From the figure, you can see the complexity of the current interface. Because these interfaces are new interfaces, speeds ranging from 50Mhz-500MHz, timing demanding, traces of delay is a major problem, domestic users have not mastered these interfaces within a short time, so basically the late timing verification unable to carry out.

Microwave segment transmission problem is caused by the serial interface, it is particularly important in the communication, mainly to resolve the multi-board problem, namely the card core chip - Connectors - Backplane - Connectors - core chip card transmission problems on the link. Serial Link no timing problems, only transmission problems need to be solved to reach the cause inter-symbol due to the frequency of the microwave signal amplitude segment and 01 bit-stream interference problems caused by the change. Part of the problem that must be used in the frequency domain and time domain tool combination. The current mainstream SQ, Hyperlynx and ICX deal with these issues is not very effective. Cadence launched in SQ in a $ 200,000 offer MGH tool (SI 630) to solve these problems, this tool actually used rarely, it seems, and there is no difference on the surface SQ, but it added a 3D vias extract Tools and a rapid conversion to S-parameter simulation function back into the time domain tool support table parameters.

Hyperlynx and ICX handle S parameters are based on Eldo to complete, but the lack of algorithm analysis in MGH long bit streams on the time required is not practical. From a strictly perspective, these tools handle the microwave band or invalid, because 3D interconnect structures extracted only rely on 3D games, another must consider the impact of the non-ideal ground between the multi-board systems, and these tools are unable to support the non-ideal ground of. So, in fact, the user needs to use Ansfoft HFSS and other tools. SI is the focus of this part, many users are papers and related. Nevertheless, for the average system designer, in fact, this is not a major part of the work, relatively speaking chip manufacturers must use these tools to solve Serdes chip design and system application problems. The usual solution is to use HFSS to extract vias, take S parameter line, then by hand or other tools such as the SI Assit Optimal handle makes it possible to extract the S-parameter accepted (almost HFSS parameter extraction as HSPICE and other time-domain tools All S parameters must be addressed in order to use the tool in the time domain). This process is not easy, and only a small number of expert engineers have the ability, because the result is not intuitive tool gives meaning, only have good theoretical background in order to understand the results. The reason for the enthusiastic domestic users, the main reason is estimated that want to improve their professional level, it's not the immediate practical needs. Therefore, Ansoft not yet enough actual competition.

As PI PCB on that power integrity, there is no practical tools available. Ansoft's SIwave and Sigrity of SPEED2000, PowerSI have no practical use, and no special point algorithm, which claimed that things actually invalid. Optimal tool only touches on the concept better, but only Beta. Its Beta version and PCB interface is very poor, not the General Assembly in a short time to be user acceptance.

Can clearly be seen from the above case, the timing analysis and ordinary SI analysis tools combined with one of the most of the market, is the main SI market, Mentor can sell on this major market top, the new ICX performance provided, should SQ to attract users to switch such tools. Mentor's ICX + Tau has the ability from the concept, but their performance is not satisfactory at present, improvement is too slow. The recently launched another company Sisoft tools Quantum-SI has such a function, although the tool has just launched, but very meet the needs of current users.

PCB SI tools feature comparison
Obviously, an ideal tool for mainstream PCB SI and SI timing analysis should be combined with one of the analysis tools. The following analysis to Sisoft's Quantum-SI as a benchmark, the purpose of doing so is conducive to understanding SQ, Hyperlynx and ICX / Tau. Background on Sisoft reflected in its website under the relevant tools. But this does not affect the comparison with the SQ, Hyperlynx and ICX / Tau's.

price
Hyperlynx price is not low, as a universal tool SI relatively high price. Quanum-SI price at $ 9000-40000. Hyperlynx is 5000-50000, the following is Sisoft comparison table: Mentor's Tau needs 35000-45000 dollars. In contrast, Hyperlynx no price advantage. ICX + Tau price? It estimated at 150,000 dollars, 120,000 dollars higher than SQ. But Cadence 630 more expensive, two billion dollars. The price of your problem is that if the user Mentor and Cadence plan submitted to the audit program, management may choose to have a low price.

Ease of use
ICX / Tau users to master more difficult, SQ is relatively easy, Hyperlynx is easiest. If the user is not superstition SQ, it will be very easy to accept Hyerlynx. And now V7.5 version improves display performance, contrary SQ add a lot of functionality due, it is more complicated to set.

Timing analysis capability
Currently timing analysis is particularly important. High-speed PCB layout nature of the problem is to solve the timing issue. Timing calculations using Excel tool is difficult and requires the user to understand the timing requirements of many new and complex parallel interfaces. Tau conceptually very good, especially with ICX solve together before and after the timing analysis. SQ basically said no timing analysis (with simple timing measurement function), Hyperlynx is no timing analysis and measurement functions. However, there is a problem Tau. Tau and Mentor pushing DxDesigner no direct interface, just and Design Architect and Design View with an interface; Schematic View Tau's own poor performance, so third-party EDIF schematic data format is actually unusable; Tau model itself lacks support, It requires users to write their own model, but also need a third-party tool TimeDesigner fit. If we can build some models Tau, Tau model train users to master creation, then will have a significant competitive advantage. It is impossible to catch up with the Cadence short term. Unless Cadence acquired TimeDesigner create a new board-level timing analysis tools. Quantum-SI in this regard than the ICX + Tau stronger. Its GUI, common interface design package (actually very little to late stage of the launch), SI measurement is very characteristic.

Simultaneous switching noise (SSO) and crosstalk analysis
Hyperlyx, SQ and ICX can not analyze SSO, crosstalk analysis functions are very limited. This Sigrity leaving market opportunity. Quantum-SI can perform complex analysis of multi-board systems, it is said to be able to support SSO, as shown below. However, according to my estimation, it can only be done at the same level and ICX or SQ.

Emulation Settings
Hyperlynx most simple, ICX less convenient, SQ than ICX to be convenient. But Hyperlyxn also has its drawbacks, is that almost no fixed settings on the measure. This aspect is a better Quantum-SI, as shown below, can be a one-time set up multiple networks, while embedded 45 kinds of sophisticated measurement mode. In this regard, SQ and ICX are not as Quantum.

Therefore, from the current situation, the user is most needed is a combination of timing and SI analysis tool integration, and the interface to optimize set up should be simple, while the need to include Design KIT. ICX + Tau as Quantum-SI If you can get the same performance improvement, then the user would be welcome. Since Mentor with the design front and rear, ICX + Tau advantage is that other tools can not be replaced.